Clock selection for processing audio data

Abstract

A circuit to provide one clock signal from a plurality of possible clock signals includes a register to receive indication of a data sampling frequency, a selection circuit operatively coupled to the register, the indicated data sampling frequency selecting one of a plurality of signals provided to the selection circuit, and a modification circuit to modify the selected signal based at least in part on the indicated sampling frequency. A method to automatically and dynamically provide one clock signal from a plurality of possible clock signals includes receiving a signal indicating a data sampling frequency, selecting one clock signal from a plurality of input clock signals based on the received data sampling frequency indication, and modifying the selected clock signal, based on the indicated sampling frequency, to generate an output clock signal. The modified selected signal (for the circuit) and the modified selected clock signal (for the method) may be provided as a clock signal to, for example, an audio processing circuit.