The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2002

Filed:

Jul. 13, 2001
Applicant:
Inventors:

Stanford W. Crane, Jr., Boca Raton, FL (US);

Lakshminarasimha Krishnapura, Delray Beach, FL (US);

Yun Li, Boca Raton, FL (US);

Moises Behar, Boca Raton, FL (US);

Dan Fuoco, Boca Raton, FL (US);

Bill Ahearn, Boca Raton, FL (US);

Assignee:

Silicon Bandwidth Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/00 ;
U.S. Cl.
CPC ...
H05K 7/00 ;
Abstract

A multi-chip module includes a housing having insulative side walls and an end plate, conductive leads extending from the side walls, integrated circuit (IC) dies mounted to the end plate, and one or more interconnect dies mounted to the end plate. The end plate is made from a heat sink material, such as copper. Each interconnect die is positioned between a pair of the IC dies. Electrically conductive material connects the IC dies to the interconnect die, connects the IC dies to the conductive leads, and connects the interconnect dies to the conductive leads. The interconnect dies function to interconnect the IC dies and to interconnect the IC dies to the conductive leads. The interconnect die may be embodied by wiring layers formed on a silicon substrate.


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