Method of forming a dram capacitor structure including increasing the surface area using a discrete silicon mask

Abstract

A process for fabricating a fin type, cylindrical shaped, DRAM capacitor structure, with increased surface area, has been developed. The process features forming a non-continuous layer of discrete regions of silicon, on the surface of a capacitor opening, in a composite insulator layer. The discrete regions of silicon are then used as an etch mask to allow an isotropic etching procedure to create horizontal channels in the sides of the portions of the composite insulator layer exposed in the capacitor opening, creating a capacitor opening comprised with horizontal channnels. An amorphous silicon layer is then deposited and patterned to form a fin type, storage node structure, comprised of amorphous silicon on discrete regions of silicon, in the capacitor opening. Formation of a capacitor dielectric layer, and an overlying top electrode structure, complete the formation of a fin type, cylindrical shaped, DRAM capacitor structure.