The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2002
Filed:
Nov. 14, 2000
John Caywood, Sunnyvale, CA (US);
John Millard and Pamela Ann Caywood 1989 Revokable Living Trust, Sunnyvale, CA (US);
Abstract
A non-volatile latch comprises first and second read/write bias nodes and first and second a complementary output nodes. First and second first conductivity type MOS transistors have sources coupled to a first voltage potential. A drain of the first MOS transistor is coupled to the first complementary output node and a drain of the second MOS transistor is coupled to the second complementary output node. Each of the first and second MOS transistors have a gate cross coupled to the drain of the other one of the first and second MOS transistor. A source of a third MOS transistor is coupled to the first read/write bias node and a source of a fourth MOS transistor is coupled to the second read/write bias node. A drain of the third MOS transistor is coupled to the first complementary output node and a drain of the fourth MOS transistor is coupled to the second complementary output node. Each of the third and fourth MOS transistors have a gate cross coupled to the source of the other one of the third and fourth MOS transistors.