The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2002

Filed:

Dec. 14, 2000
Applicant:
Inventors:

Masayuki Sasaki, Nagano, JP;

Kazunari Imai, Nagano, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/03 ;
U.S. Cl.
CPC ...
H05K 1/03 ;
Abstract

A multilayered wiring board comprising, at least, two wiring layers and an interlaminar insulating layer, in which said wiring board further has, incorporated therein, at least one capacitor element which comprises a sandwiched structure of a lower electrode-forming metallic layer having formed thereon at least one recess portion, a dielectric layer formed over the lower electrode-forming metallic layer, and an upper electrode-forming metallic layer formed over the dielectric layer, and its production process. The semiconductor device comprising the multilayered wiring board having mounted thereon a semiconductor element is also disclosed.


Find Patent Forward Citations

Sasaki, Masayuki. (2002). Multilayered wiring board, a production process for, and semiconductor device using, the same (U.S. Patent No. 6410858). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6410858

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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