The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

Mar. 31, 1999
Applicant:
Inventors:

Suryanarayana Duggirala, San Jose, CA (US);

Rohit Kapur, Cupertino, CA (US);

Thomas W. Williams, Boulder, CO (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/128 ;
U.S. Cl.
CPC ...
G01R 3/128 ;
Abstract

A computer implemented method of constructing a scan chain. According to the present invention, scan cells are inserted into a netlist description of an integrated circuit design and are coupled serially together to form a scan chain. The resulting netlist is then passed to layout processes where the cells of the integrated circuit design are automatically placed and routed. The layout processes are performed without regard to any predetermined constraints designating any particular functional pins of the netlist design as scan-in or scan-out ports for the scan chain. After the cells are placed, a first functional pin is selected as the scan-in port and a second functional pin is selected as the scan-out port according to cell placement information. In particular, the functional pin that is closest to the leading scan cell is selected as the scan-in port. The functional pin that is closest to the last scan cell is selected as the scan-out port for the scan chain. Scan-in functionalities are then added to the first functional pin and scan-out functionalities are added to the second functional pin. The present invention thereby improves cell placement and wire routability, and allows a better integrated circuit to be designed and fabricated.


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