The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2002
Filed:
Dec. 02, 1999
Applicant:
Inventor:
Marc Guedj, Pont Saint-Esprit, FR;
Assignee:
STMicroelectronics S.A., Gentilly, FR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 1/606 ;
U.S. Cl.
CPC ...
G11C 1/606 ;
Abstract
A circuit and method for reading a multiple-level floating-gate memory is provided. The reading is done by a gate bias voltage VP that is equal to the voltage needed to obtain a predetermined reference current Iref in the selected storage transistor. The decoding of the stored data element is done by the decoding of the bias voltage VP. Thus the circuit and method reduces the current flowing through the transistors during the reading and reduces the mean electrical stress undergone during each read operation.
Guedj, Marc. (2002). Multiple level floating-gate memory (U.S. Patent No. 6404679). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6404679
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile