The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

Dec. 20, 1999
Applicant:
Inventors:

Shigetsugu Muramatsu, Nagano, JP;

Michio Horiuchi, Nagano, JP;

Takuya Kazama, Nagano, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/102 ;
U.S. Cl.
CPC ...
G01R 3/102 ;
Abstract

A substrate for inspecting an electronic device used for an electrical test of the electronic device having bump-shaped connection terminals, comprises: opening sections, the diameter of each opening being determined so that a connection terminal can be inserted into and drawn out from the opening, are formed penetrating the insulating substrate in a region on one side of an insulating substrate on which the electronic device is mounted, corresponding to an arrangement of the connection terminals; and wiring patterns, each of which is composed of a pad section being exposed onto a bottom face of the opening so that the pad can come into contact with the connection terminal so as to accomplish electrical continuity, a connecting pad section formed in a region outside of the region in which the pad section is formed, which comes into contact with a contact terminal of an inspection device so as to accomplish electrical continuity, and a wiring section for electrically connecting the pad section with the connecting pad section, are formed on the other side of the insulating substrate.


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Muramatsu, Shigetsugu. (2002). Substrate for inspecting electronic device, method of manufacturing substrate, and method of inspecting electronic device (U.S. Patent No. 6404214). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6404214

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