The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2002
Filed:
Dec. 01, 1998
Xiao-Yu Li, Santa Clara, CA (US);
Steven J. Fong, Santa Clara, CA (US);
Vantis Corporation, Sunnyvale, CA (US);
Abstract
An EEPROM cell is described that is programmed and erased by electron tunneling across an entire portion of separate transistor channels. The EEPROM cell has three transistors formed in a semiconductor substrate. The three transistors are a tunneling transistor (PMOS), a sense transistor (NMOS) and a read transistor (NMOS). Electron tunneling occurs to program the EEPROM cell through a sense tunnel oxide layer having a thickness to allow the electron tunneling across an entire portion of a sense channel upon incurrence of a sufficient voltage potential between a floating gate and the tunnel channel. Electron tunneling also occurs to erase the EEPROM cell through a tunnel oxide layer having a thickness to allow electron tunneling across an entire portion of a tunneling channel upon incurrence of a sufficient voltage potential between the floating gate and the tunneling channel.