The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2002
Filed:
Dec. 30, 1997
Chitranjan N. Reddy, Los Altos Hills, CA (US);
Alliance Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A method of manufacturing integrated circuits having single and multiple device modes is described. In a preferred random access memory (RAM) embodiment, a first static RAM (SRAM) having a “by n” input/output (I/O) configuration is fabricated adjacent to a second SRAM having the same I/O configuration. An interconnect scheme spans a single device scribe line that separates SRAM from SRAM , and carries address, timing, and control signals between the adjacent SRAMs ( and ). In the event single SRAMs of a “×n” configuration are desired, the wafer is sawed along the single device scribe line severing the interconnect scheme . In the event multiple device SRAMs of a “×2n” configuration are desired, the wafer is sawed into multiple device dies, and the interconnect scheme kept intact.