The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2002

Filed:

Apr. 05, 1999
Applicant:
Inventors:

William J. Baggenstoss, Boise, ID (US);

William A. Stanton, Boise, ID (US);

Assignee:

Micron Technology Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

A computer implemented method that uses a full integrated circuit (IC) chip design, to be printed by an attenuated phase shift mask, as an input parameter. Each feature environment within the input full IC chip design is individually simulated to determine how the features within the environment would be printed from the mask created according to the input design. The simulation of each environment also determines the extent and locations of unwanted side lobes that would also be printed from the mask. Once the side lobes are determined, auxiliary features are incorporated into the input design so that the auxiliary features will become transparent openings within a mask created in accordance with the modified input design. Each auxiliary feature opening is placed at a side lobe location and is designed to eliminate the side lobe by passing radiant energy that is 180 degrees out of phase with the radiant energy of the side lobe. Thus, each auxiliary feature serves as a side lobe inhibitor when incorporated into the mask. The modified input design undergoes a proximity correction to ensure that features of each environment print as originally desired. Once corrected, each environment is simulated again to verify that its features will print as originally desired and without side lobes. Once verified, the modified input design is used to create an attenuated phase shift mask that prints the desired features, but does not print side lobes.


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