Fifo memory system and method with improved determination of amount of data stored using a binary read address synchronized to a write clock

Abstract

A system and method for operating an asynchronous first in, first out (FIFO) memory system in which the amount of data stored in a FIFO memory is determined by re-synchronizing a binary read address from a read clock signal to a write clock signal, then subtracting the write-synchronized read address from the binary write address. The FIFO memory system includes the FIFO memory, read and write address counters for generating the binary read address and binary write address, respectively, and a write synchronization circuit. The binary read address is converted into a Gray-code value which is then synchronized to the write clock signal. The write-synchronized Gray-code read address value is then re-converted to binary to form the write-synchronized read address.