The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2002

Filed:

Dec. 30, 1999
Applicant:
Inventors:

Jed Griffin, Forest Grove, OR (US);

Ernest Khaw, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/716 ;
U.S. Cl.
CPC ...
H03K 1/716 ;
Abstract

According to one aspect of the invention, a circuit is provided that includes a drive stage having an input and output node, and at least one transistor coupled between the two nodes. An upper impedance element coupled at one end to the output node and at another end to an upper supply node is provided. The upper impedance element has a stack of transistors each having a beta matched to a beta of at least one transistor in the drive stage. A lower impedance element coupled at one end to the output node and at another end to a lower supply node is provided. The lower impedance element has a stack of transistors each having a beta matched to the beta of at least one transistor in the drive stage. In another embodiment, a circuit is provided that includes a plurality of transistors coupled in parallel between a supply node and a pre-drive stage. The plurality of transistors each have a gate coupled to a delay select line to control current through the pre-drive stage.


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