The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2002

Filed:

Nov. 10, 1999
Applicant:
Inventors:

Lap-Wai Chow, South Pasadena, CA (US);

Tsung-Yuan Hsu, Westlake Village, CA (US);

Daniel J. Hyman, Cleveland, OH (US);

Robert Y. Loo, Agoura Hills, CA (US);

Paul Ouyang, San Jose, CA (US);

James H. Schaffner, Chatsworth, CA (US);

Adele Schmitz, Newbury Park, CA (US);

Robert N. Schwartz, Costa Mesa, CA (US);

Assignee:

HRL Laboratories, LLC, Malibu, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01P 1/10 ; H01H 5/700 ; H03K 1/7975 ;
U.S. Cl.
CPC ...
H01P 1/10 ; H01H 5/700 ; H03K 1/7975 ;
Abstract

A microelectromechanical (MEM) switch is fabricated inexpensively by using processing steps which are standard for fabricating multiple metal layer integrated circuits, such as CMOS. The exact steps may be adjusted to be compatible with the process of a particular foundry, resulting in a device which is both low cost and readily integrable with other circuits. The processing steps include making contacts for the MEM switch from metal plugs which are ordinarily used as vias to connect metal layers which are separated by a dielectric layer. Such contact vias are formed on either side of a sacrificial metallization area, and then the interconnect metallization is removed from between the contact vias, leaving them separated. Dielectric surrounding the contacts is etched back so that they protrude toward each other. Thus, when the contacts are moved toward each other by actuating the MEM switch, they connect firmly without obstruction. Tungsten is typically used to form vias in CMOS processes, and it makes an excellent contact material, but other via metals may also be employed as contacts. Interconnect metallization may be employed for other structural and interconnect needs of the MEM switch, and is preferably standard for the foundry and process used. Various metals and dielectric materials may be used to create the switches, but in a preferred embodiment the interconnect metal layers are aluminum and the dielectric material is SiO , materials which are fully compatible with standard four-layer CMOS fabrication processes.


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