The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2002

Filed:

Jan. 09, 2001
Applicant:
Inventors:

Le-Tien Jung, Hsinchu, TW;

Ming-Jing Ho, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

A method of manufacturing a ROM cell. A DRAM cell is provided. An ONO (oxide-nitride-oxide) stacked layer is used as a dielectric film of a capacitor of the DRAM cell. When a supply power is over 6 volts, the dielectric layer would be breakdown so that leakage is occurred between a lower electrode and an upper electrode of the capacitor. The DRAM cell, which can be used as a ROM cell, is thus readout as a stock at fault to stock a logic state of “1” or “0”. The stored data as “1” or “0” is depended on voltage of the upper electrode (V ) and a voltage of the bit line (V ). If V >V , the breakdown of the dielectric film would make the cell stock at “1”, and a normal DRAM cell is stocked at “0”, and vice versa.


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