Fabrication method of high-density semiconductor memory cell structure having a trench

Abstract

A high density semiconductor memory device is provided. The memory device includes a transistor and a capacitor formed along the sidewall of a trench. The trench is formed below the crossing of a word line and a bit line. The capacitor is formed by diffusing dopants into the substrate surrounding the lower portion of the trench, depositing an insulating layer, and depositing a conducting layer into the trench. The transistor is formed in the substrate adjacent to the upper sidewall of the trench. The source region is formed by thermal drive-in, and the drain region is formed by ion-implantation. The gate electrode is formed by depositing a conducting material into the trench. A gate contact window connects the gate electrode to the word line, and a drain contact window connects the drain to the bit line. The drain region of two adjacent memory cells are connected, and share the same drain contact window. An isolation layer surrounds the common drain region and the two transistors sharing a drain contact window to prevent signal interference with other transistors.