The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2002

Filed:

Apr. 05, 1999
Applicant:
Inventors:

Glenn A. Rinne, Cary, NC (US);

Joseph Daniel Mis, Cary, NC (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/10 ; B23K 3/102 ;
U.S. Cl.
CPC ...
H05K 3/10 ; B23K 3/102 ;
Abstract

A method for forming routing conductors and solder bumps on a microelectronic substrate includes the steps of forming an under bump metallurgy layer on the substrate and forming a solder structure on the under bump metallurgy layer where the solder structure includes an elongate portion and an enlarged width portion. The portions of the under bump metallurgy layer not covered by the solder structure can be selectively removed using the solder structure as a mask. In addition, the solder is caused to flow from the elongate portion of the solder structure to the enlarged width solder portion thereby forming a raised solder bump. This step is preferably performed by heating the solder structure above its liquidus temperature allowing surface tension induced internal pressures to affect the flow. Various solder structures are also disclosed.


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