The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2002
Filed:
Sep. 29, 2000
Applicant:
Inventor:
Jerry G. Jex, Olympia, WA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 ;
U.S. Cl.
CPC ...
H03K 3/017 ;
Abstract
An apparatus, method and means for providing a clock signal and an inverted clock signal having corresponding rise and fall edge rates, being resistant to load variations, process variations, voltage variations, and temperature variations. The apparatus output exceeds a threshold voltage for apparatus circuit paths. In one aspect of the invention, a combination of N channel and P channel devices, viewed as symmetrical P stacks and N stacks, are utilized. Low output impedance and high gain is provided for resistance to load variations.