Self-aligned contact process using stacked spacers

Abstract

A self-aligned contact process is provided on a semiconductor substrate having at least two gate structures and a plurality of lightly ion-doped regions on the semiconductor substrate. Each of the gate structures has a gate layer and a cap layer formed on the gate layer. A first sidewall spacer is formed on the sidewalls of the gate structure, and then a heavy ion-doped region is formed on the exposed lightly ion-doped region. Next, a first dielectric layer is formed to fill the gap between adjacent first sidewall spacers. Part of the first sidewall spacer and part of the first dielectric layer is removed to expose the cap layer. A second spacer is then formed on the exposed sidewall of the cap layer. Next, a second dielectric layer is formed to fill the gap between adjacent second sidewall spacers. Finally, the second dielectric layer and the first dielectric layer positioned adjacent gate structures are removed to expose the second ion-doped region so as to form a contact hole.