The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6377334 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 23, 2002

Filed:

Jan. 24, 2001
Applicant:
Inventor:

Charles A. Whiting, Milton, VT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G03B 2/752 ; G03B 2/772 ; G03B 2/754 ; G03C 5/00 ; A61N 5/00 ;
U.S. Cl.
CPC ...
G03B 2/752 ; G03B 2/772 ; G03B 2/754 ; G03C 5/00 ; A61N 5/00 ;
Abstract

A method for the control of wafer surface temperatures during post exposure bake on hot plates of wafers which carry integrated circuits. Also disclosed is a method of maximizing image size uniformity for integrated circuits through the zonal control of temperatures of hot plates during post exposure bake processes for effectively modulating the wafer surface temperatures. Images within a semiconductor wafer integrated circuit line pattern are repeated to process a wafer through the photolithographic patterning process, including post exposure baking, to measure the image linewidths and compare these with an experimentally derived correlation chart; for instance, PEB temperature vs. linewidth for a given or specified photomasking process. The data is then mapped with regard to image size versus hot plate position, and individual heating zones of the hot plate are adjusted in their temperature for maximum degree of image size uniformity and ultimately attaining optimal device speed and pattern line processing uniformity control.


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