The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 23, 2002
Filed:
Mar. 14, 2000
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
There is provided a semiconductor device in which redundancy fuses formed in an upper layer wiring region can be cut without damaging an underlying Si substrate or adjacent regions. The semiconductor device comprises a lower layer wiring formed within an interlayer insulating film on the Si substrate, and an upper layer metal wiring made of Al, Cu or the like, formed above the lower layer wiring and connected thereto through a via metal, wherein the redundancy fuses are formed in the same wiring layer as the upper layer metal wiring. For cutting a fuse by irradiating with a laser having a wavelength in a range of 1,000 to 1,100 nm and a beam diameter D (&mgr;m), the fuse may be designed to have a film thickness T (&mgr;m) and a width W (&mgr;m) which satisfy T≦(−0.15 (D+2&sgr;)+0.46) exp (2W), where &sgr; (&mgr;m) is an alignment accuracy of the center of the laser beam to the center of the fuse, with the result that the fuse formed in the same wiring layer as the upper layer metal wiring can be cut without damaging the Si substrate, an adjacent fuse and the upper layer metal wiring.