The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2002

Filed:

Jan. 11, 2000
Applicant:
Inventors:

Jiri L. Vasat, Chesterfield, MO (US);

Andrei Stefanescu, O'Fallon, MO (US);

Thomas M. Hanley, St. Charles, MO (US);

Assignee:

MEMC Electronic Materials, Inc., St. Peters, MO (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/126 ;
U.S. Cl.
CPC ...
H01L 2/126 ;
Abstract

A process for manufacturing polished-like first-grade semiconductor wafers is disclosed. The process greatly simplifies the amount of polishing required while producing high quality semiconductor wafers. After a semiconductor wafer is sliced from a single crystal ingot, lapped and ground, the wafer is subjected to a double side fine grinding operation, a micro-etching operation, and an annealing operation to significantly improve the quality of the front surface. To complete to process the semiconductor wafer is flash polished to impart a specular finish on the front surface. In accordance with the present invention the semiconductor wafers may also be produced having a denuded zone capable of internal gettering.


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