The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2002

Filed:

May. 15, 1998
Applicant:
Inventors:

Yei-Hsiung Lin, Hsinchu, TW;

Chen-Bin Lin, Taipei, TW;

Chin-Chun Huang, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ; H01L 2/348 ;
U.S. Cl.
CPC ...
H01L 2/14763 ; H01L 2/348 ;
Abstract

A method of manufacturing metallic interconnects capable of reducing internal stress inside the metallic layer. The method comprises the steps of forming a silicon-rich oxide layer both before and after the formation of a metallic layer. Therefore, the metallic layer is fully enclosed by silicon-rich oxide layers and any direct contact between the metallic layer and any silicon dioxide layer is avoided. Since the quantity of silicon in the silicon-rich oxide layer is much higher than in a silicon dioxide layer, bonds formed between a silicon atom and an oxygen atom in the silicon-rich oxide layer are much stronger. Consequently, the chance for an aluminum atom in the metallic layer to react with an oxygen atom in the silicon-rich oxide layer is greatly reduced. Hence, lattice vacancies/voids that can lead to conventional stress migration and thermal induced migration problems are prevented.


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