The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 16, 2002
Filed:
Apr. 06, 1998
John K. Gee, Mt. Vernon, IA (US);
David A. Greve, Cedar Rapids, IA (US);
David S. Hardin, Cedar Rapids, IA (US);
Allen P. Mass, Lisbon, IA (US);
Michael H. Masters, Cedar Rapids, IA (US);
Nick M. Mykris, Cedar Rapids, IA (US);
Matthew M. Wilding, Cedar Rapids, IA (US);
Rockwell Collins, Inc., Cedar Rapids, IA (US);
Abstract
Multiple Java Virtual Machines (JVMs) operate on a single direct execution JAVA processor with each JVM operating in a separate time slice called a partition. Each JVM has its own data and control structures and is assigned a fixed area of memory. Each partition is also allotted a fixed period of time in which to operate, and, at the end of the allotted time, a context switch is forced to another JVM operating in the next partition. The context switch does not transfer control directly from one JVM to another JVM. Instead, at the end of a partition time period control is switched from the currently operating JVM to a “master JVM” during a time period called an “interstice.” The master JVM handles system interrupts and housekeeping duties. At the end of the interstice time period, the master JVM starts a proxy thread associated with the next JVM to become operational. The proxy thread handles JVM-specific interrupts and checks the status of the associated JVM. If the JVM appears operational the proxy thread transfers control to the JVM thread. Time intervals such as partition times and interstice times are enforced by hardware timers and memory accesses are checked by address comparison circuitry to prevent a system failure due to a malfunction in either the master JVM or another JVM.