Dram cell having storage capacitor contact self-aligned to bit lines and word lines

Abstract

A DRAM cell ( ) having a capacitor-over-bit line (COB) structure self-aligned to the word lines and bit lines is disclosed. Word lines ( ) and bit lines ( ) are formed with insulating structures that include insulating sidewalls. The word line insulating structure includes an etch barrier layer ( ) that extends over a source region ( ). A first interlayer dielectric (ILD) ( ) insulates the word lines ( ) from the bit lines ( ) and a second ILD ( ) insulates the bit lines from a cell capacitor. A capacitor contact hole ( ), self-aligned with the bit lines and the word lines, is formed by etching through the first and second ILDs ( and ) to expose the etch barrier layer ( ) over the source region ( ). Portions of the bit line and word line exposed by the etch are protected by their respective insulating structures. The exposed etch barrier layer ( ) over the source region ( ) is cleared and a storage capacitor is formed having a contact that extends into the contact hole to make contact with the source region ( ).