The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2002

Filed:

Sep. 14, 1999
Applicant:
Inventors:

Billy Wayne Garrett, Jr., Mountain View, CA (US);

Frederick Abbott Ware, Los Altos Hills, CA (US);

Craig E. Hampel, San Jose, CA (US);

Richard M. Barth, Palo Alto, CA (US);

Don Stark, Los Altos, CA (US);

Abhijit Mukund Abhyankar, Sunnyvale, CA (US);

Catherine Yuhjung Chen, Milpitas, CA (US);

Thomas J. Sheffler, San Francisc, CA (US);

Ely K. Tsern, Los Altos, CA (US);

Steven Cameron Woo, Saratoga, CA (US);

Assignee:

Rambus INC, Los Altos, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 2/900 ;
U.S. Cl.
CPC ...
G11C 2/900 ;
Abstract

The present invention provides a high data bandwidth memory system capable of operating in non-chip-kill and chip-kill modes. In chip-kill mode, cycle multiplexing, bit multiplexing, and time and space multiplexing are used to read/write data and syndrome across a group of memory devices. Current command packet formats are adapted to communicate with the group of memory devices in chip-kill mode.


Find Patent Forward Citations

Garrett, Jr., Billy. (2002). High speed memory system capable of selectively operating in non-chip-kill and chip-kill modes (U.S. Patent No. 6370668). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6370668

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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