The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2002
Filed:
Nov. 08, 2000
Tai-Ju Chen, Tai-Nan, TW;
Hua-Chou Tseng, Hsin-Chu, TW;
United Microelectronics Corp., Hsin-Chu, TW;
Abstract
The present invention provides a method of fabricating a STI on a wafer to eliminate the common occurrence of junction leakage in the prior art. The method begins by forming a patterned hard mask on a silicon substrate. The patterned hard mask is a laminated layer comprising a pad oxide and a silicon nitride layer, and exposes a portion of the surface of the silicon substrate. The exposed portion of the silicon substrate is then dry etched to form a trench in the silicon substrate having a <100> surface and a <111> surface. Next, a portion of the pad oxide is wet etched around the STI corners of the trench to expose a portion of the top surface of the silicon substrate surrounding the periphery of the trench. A microwave-excited Kr/O plasma is used to oxidize both the interior surface of the trench and the exposed top surface of the silicon substrate located beneath the layer of silicon nitride surrounding the periphery of the trench at a temperature of 400° C. to form a silicon dioxide liner of uniform thickness on the STI <100> surfaces and <111> surface. Finally, an insulating material, such as HDP oxide, is deposited on the silicon substrate to fill in the trench followed by a chemical-mechanical polishing.