The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2002

Filed:

Mar. 31, 2000
Applicant:
Inventor:

Philip W. Doberenz, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 5/02 ;
U.S. Cl.
CPC ...
H03B 5/02 ;
Abstract

A circuit for generating a clock signal is provided. The circuit includes a flip-flop having a first input and a second input. The flip-flop is operable to generate a first output signal and a second output signal. The circuit also includes a first delay chain and a second delay chain. The first delay chain is operable to receive the first output signal and generate a first delayed signal. The first delayed signal is then received by the first input of said flip-flop. The second delay chain is operable to receive the second output signal and generate a second delayed signal. The second delayed signal is then received by the second input of said flip-flop.


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