The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2002
Filed:
Nov. 08, 2000
Roman J. Hamerski, Olathe, KS (US);
FabTech, Inc., Lee's Summit, MO (US);
Abstract
A single step etched moat ( ), having a regular grid work mask ( ) of mesa shields ( ) and edge termination shields ( ), is utilized to form, in a single etching step, semiconductor devices ( ) having lengthy edge terminations for reduced edge termination failure. The desired semiconductor devices ( ) include a high resistivity, monocrystalline grown substrate layer ( ), a low resistivity epitaxial base layer ( ), and a low resistivity top layer ( ). The regular grid work of mesa shields ( ) and edge termination shields ( ) define open grid lines ( ) and open grid rings ( ). The open grid lines ( ) are wider than the open grid rings ( ), so that as the moats ( ) are etched, a deeper grid line divot ( ) is formed below the open grid lines ( ) and a more shallow grid ring divot is formed below the open grid ring ( ).