Method of manufacturing a vertical-channel mosfet

Abstract

A submicrometer vertical-channel MOSFET of high quality and reproducibility is produced by a method compatible with DPSA technology. The method steps are performed on a wafer of semiconductor material having a layer with n conductivity. First, n impurity ions and p impurity ions are implanted in an area of the layer and the wafer is subjected to a high-temperature treatment. The impurities, the implantation doses and energies, and the high-temperature treatment time and temperature being such as to form a first p region, and a second n region which forms a pn junction with the first region. A trench is hollowed out which intersects the first region and the second regions. The method further includes forming a dielectric coating on the lateral surface of the trench, depositing electrically-conductive material in the trench in contact with the dielectric, and forming elements for electrical contact with the n conductivity layer, with the second region, and with the electrically-conductive material inside the trench, to produce drain, source and gate electrodes of the MOSFET, respectively.