The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2002

Filed:

Jul. 22, 1999
Applicant:
Inventors:

Luu Nguyen, Sunnyvale, CA (US);

Nikhil Kelkar, Santa Clara, CA (US);

Christopher Quentin, Fremont, CA (US);

Ashok Prabhu, Sunnyvale, CA (US);

Hem P. Takiar, Fremont, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
U.S. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
Abstract

A method and apparatus for forming a layer of underfill adhesive on an integrated circuit located on a wafer surface are described. As a flip chip, the integrated circuit has electrically conductive pads, most of which have a solder ball attached thereto. A layer of underfill adhesive is then formed on the wafer surface such that at least some portion of most of the solder balls remain uncovered. The layer of underfill adhesive is partially cured and the flip chip is then mounted onto a substrate. A solder reflow operation electrically couples the flip chip and the substrate as well as fully cures the underfill adhesive.


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