The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2002

Filed:

Jun. 28, 2000
Applicant:
Inventors:

Stephen R. Mooney, Beaverton, OR (US);

Matthew B. Haycock, Beaverton, OR (US);

Aaron K. Martin, Hillsboro, OR (US);

Jonathan N. Spitz, Portland, OR (US);

Michael S. Sandhinti, Olympia, WA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 1/116 ;
U.S. Cl.
CPC ...
H03H 1/116 ;
Abstract

A variable-delay circuit on an integrated circuit is used to delay a periodic strobe signal. In normal operation, the strobe signal can be shifted 90 degrees to center it within a data bit cell. In test mode, it can also be shifted up to 270 degrees in N increments to measure the effective input latch setup and hold timings. The variable-delay circuit comprises a voltage-mixing interpolator circuit to produce phase delays in N increments. The variable-delay circuit can incorporate an existing delay locked loop. Also described are an electronic system, a data processing system, and various methods of performing on-chip testing and calibration.


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