The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2002
Filed:
Jan. 14, 2000
Tooru Yamaoka, Toyohashi, JP;
Atsushi Komura, Obu, JP;
Takeshi Yamauchi, Nagoya, JP;
Yoshihiko Isobe, Toyoake, JP;
Hiroyuki Yamane, Anjo, JP;
Nippondenso Co., Lt., , JP;
Abstract
The purpose of the present invention is to obtain an electrode wiring structure for semiconductor devices that can suppress the occurrence of Al voids inside aluminum alloy wiring without regard to the orientation of such aluminum alloy wiring. An interlayer insulator film , a titanium layer , a titanium nitride layer that serves as the barrier layer, an aluminum alloy wiring layer and a protective film are formed on top of the silicon substrate to compose the electrode structure. In this case, a distortion relaxation layer , with a film thickness of approximately over 10 nm and which is an intermetallic compound that includes aluminum and titanium in its composition, is formed in between the titanium nitride layer and the aluminum alloy wiring layer . Because of this distortion relaxation layer, for every wiring width of 1 &mgr;m, the number of Al voids with widths of over 0.3 &mgr;m is practically reduced to 0.