The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2002

Filed:

Feb. 21, 2001
Applicant:
Inventors:

Fuh-Cheng Jong, Tainan, TW;

Kent Kuohua Chang, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01K 2/18247 ;
U.S. Cl.
CPC ...
H01K 2/18247 ;
Abstract

A method for forming a nonvolatile memory with optimum bias condition is disclosed. Initially, an ONO structure is formed on the substrate wherein the ONO structure has a first oxide layer, a nitride layer and a second oxide layer. Afterwards, a plurality of openings is formed on the ONO structure and a portion of substrate is exposed. An optimum condition of a nonvolatile memory cell having a threshold voltage region wherein the threshold voltage region can be optimum by adjusting a lateral electric field between a drain and a gate to transfer a plurality of electrons into the ONO structure. Thereafter, an implant process is performed to form a plurality of bit lines on substrate. An oxide layer is formed on bit lines to create a bit lines oxide layer. Finally, a polysilicon is formed on bit lines oxide layer and the ONO structure to produce the nonvolatile memory cell. Alternatively, after a nonvolatile memory cell is made, the optimum threshold voltage region can be selected by adjusting a lateral electrical field between a drain and a gate to transfer a plurality of electrons into the ONO structure.


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