The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2002

Filed:

Aug. 03, 1999
Applicant:
Inventors:

Terri A. Couteau, Rosanky, TX (US);

W. Jarrett Campbell, Austin, TX (US);

Anthony Toprac, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/30 ;
U.S. Cl.
CPC ...
G03F 7/30 ;
Abstract

A method for processing a semiconductor topography is presented. In the present processing method, a semiconductor topography may be provided having a polysilicon feature arranged above a semiconductor substrate. The polysilicon feature may have an initial polysilicon feature critical dimension (CD). A chemical mixture, preferably contained in a chemical vessel, may also be provided. A polysilicon etch rate-effective attribute of the chemical mixture may be measured. Subsequently, an exposure time to the chemical mixture for the semiconductor topography may be calculated from the polysilicon etch rate-effective attribute, the initial polysilicon feature CD, and a goal polysilicon feature CD. By calculating an exposure time for the semiconductor topography in such a manner, the method preferably allows a final polysilicon feature CD to be more accurately controlled than in conventional processes.


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