Memory device and method for manufacture

Abstract

A semiconductor memory device with a floating gate that includes a plurality of nanoclusters ( ) and techniques useful in the manufacturing of such a device are presented. The device is formed by first providing a semiconductor substrate ( ) upon which a tunnel dielectric layer ( ) is formed. A plurality of nanoclusters ( ) is then grown on the tunnel dielectric layer ( ). The growth of the nanoclusters ( ) may be accomplished using low pressure chemical vapor deposition (LPCVD) or ultra high vacuum chemical vapor deposition (UHCVD) processes. Such growth may be facilitated by formation of a nitrogen-containing layer ( ) overlying the tunnel dielectric layer ( ). After growth of the nanoclusters ( ), a control dielectric layer ( ) is formed over the nanoclusters ( ). In order to prevent oxidation of the formed nanoclusters ( ), the nanoclusters ( ) may be encapsulated using various techniques prior to formation of the control dielectric layer ( ). A gate electrode ( ) is then formed over the control dielectric ( ), and portions of the control dielectric, the plurality of nanoclusters, and the gate dielectric that do not underlie the gate electrode are selectively removed. After formation of spacers ( ), source and drain regions ( ) are then formed by implantation in the semiconductor layer ( ) such that a channel region is formed between the source and drain regions ( ) underlying the gate electrode ( ).