Method for forming transistor devices with different spacer width

Abstract

A method for forming transistor devices with different spacer width for mixed-mode IC is provided. The method provides three different kinds of transistor devices on a wafer, two of them have their own spacer with different width, while the remaining one is without a spacer. The method comprises providing a semiconductor substrate having at least a first conductive gate, a second conductive gate and a third conductive gate formed thereon, and forming a first oxide layer over the first conductive gate, the second conductive gate and the third conductive gate. Then, a first etch operation is performed to form an oxide spacer along each sidewall of the first conductive gate, the second conductive gate and the third conductive gate. A first mask is then formed over the first conductive gate, and then the spacer is removed formed along each sidewall of the second conductive gate and the third conductive gate. After that, the first mask over the first conductive gate is removed. Subsequently, a silicon nitride layer is formed with a thickness different from that of the first oxide layer over the first conductive gate, the second conductive gate and the third conductive gate. Then, a second etch operation is performed to form a spacer of silicon nitride along each sidewall of the second conductive gate and the third conductive gate. Thereafter, a second conformal oxide layer is formed over the first conductive gate, the second conductive gate and the third conductive gate. Subsequently, a second mask is formed over the second oxide layer formed on the second conductive gate, while exposing the second conformal oxide layer over the first conductive gate and the third conductive gate. The second oxide layer is removed, and then the second mask is removed. Finally, the spacer of silicon nitride is removed along each sidewall of the third conductive gate with hot H PO aqueous solution.