The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2002

Filed:

Jun. 18, 1998
Applicant:
Inventors:

Hiroaki Nakaoka, Osaka, JP;

Hiromasa Fujimoto, Osaka, JP;

Atsushi Hori, Osaka, JP;

Takashi Uehara, Osaka, JP;

Takehiro Hirai, Shiga, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/701 ; H01L 2/712 ; H01L 3/10392 ;
U.S. Cl.
CPC ...
H01L 2/701 ; H01L 2/712 ; H01L 3/10392 ;
Abstract

In a silicon layer formed on an insulator layer, a lattice defect region is formed to be adjacent to a channel region and source/drain regions, and the lower part of the channel region functions as a high-concentration channel region. The holes of hole-electron pairs generated in the channel region are eliminated by recombination in the lattice defect region, thereby suppressing the bipolar operation resulting from the accumulation of holes and increasing the source/drain breakdown voltage. The threshold value of a parasitic transistor is increased by the high-concentration channel region so as to reduce the leakage current in the OFF state. Alternatively, the holes may be moved to the source region to disappear therein by providing, instead of the lattice defect region, a high-concentration diffusion layer constituting and operating as a pn diode between the channel and source regions. Thus, it is possible to provide an SOI transistor causing no decrease in the source/drain breakdown voltage resulting from substrate floating effects and causing little OFF leakage current because of the activation of the parasitic transistor.


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