The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2001

Filed:

Apr. 15, 1999
Applicant:
Inventors:

Dave L. Hill, Cornelius, OR (US);

Douglas M. Carmean, Beaverton, OR (US);

Brent E. Lince, Hillsboro, OR (US);

Muntaquim F. Chowdhury, Portland, OR (US);

Assignee:

Intel Corporation, Santa Ana, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/208 ;
U.S. Cl.
CPC ...
G06F 1/208 ;
Abstract

A system for write-combining uncacheable stores includes a memory order buffer, which receives first and second stores, and a data cache address and control, which receives the first and second stores from the memory order buffer. One of the memory order buffer and the data cache address and control determines whether the first and second stores are uncacheable and whether the first and second stores are contiguous in memory. If those conditions are satisfied, the data cache address and control write-combines the first and second stores before committing them to memory. The system may also apply additional conditions to determine whether the stores should be write-combined, for example requiring a minimum size for each store.


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