The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2001

Filed:

Dec. 09, 1998
Applicant:
Inventors:

Xia Li, Fremont, CA (US);

Ranji Gannamani, Santa Clara, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/30 ;
U.S. Cl.
CPC ...
H05K 3/30 ;
Abstract

A system and method for providing plastic ball grid array (“PBGA”) packages is disclosed. In one aspect, the method and system provide a plurality of PBGA packages. Each of the plurality of PBGA packages including a semiconductor die and a portion of a substrate. The semiconductor die is electrically coupled to the portion of the substrate. The portion of the substrate has an edge. In this aspect, the method and system include forming the plurality of PBGA packages on the substrate and separating the portion of the substrate for each of the plurality of PBGA packages. The portion of the substrate for one of the plurality of PBGA packages is separated from the portion of the substrate for another of the plurality of PBGA packages by a gap. In a preferred embodiment, the gap is created by punching the substrate. The method and system further include filling the gap with a moisture sealant and cutting the moisture sealant to separate the plurality of PBGA packages. The edge of the portion of the substrate for each of the plurality of PBGA packages is substantially covered by the moisture sealant. In another aspect, the method and system include providing a semiconductor die, a substrate having an edge, and a moisture sealant. The semiconductor die is electrically coupled to the substrate. The substrate has an edge. The moisture sealant substantially covers the edge of the substrate.


Find Patent Forward Citations

Li, Xia. (2001). Method and system for sealing the edge of a pbga package (U.S. Patent No. 6324756). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6324756

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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