The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2001

Filed:

Sep. 16, 1999
Applicant:
Inventors:

Yoshirou Nakata, Nara, JP;

Toshio Yamada, Osaka, JP;

Atsushi Fujiwara, Kyoto, JP;

Isao Miyanaga, Osaka, JP;

Shin Hashimoto, Osaka, JP;

Yukiharu Uraoka, Nara, JP;

Yasushi Okuda, Osaka, JP;

Kenzou Hatada, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 1/073 ;
U.S. Cl.
CPC ...
G01R 1/073 ;
Abstract

A retainer board, holding a semiconductor wafer having a plurality of integrated circuit terminals for testing a semiconductor chip, is provided in confronting relation to a probe sheet having a plurality of probe terminals electrically connected to their corresponding integrated circuit terminals. An insulating substrate, having wiring electrically connected to the plural probe terminals, is provided on the probe sheet in opposed relation to the retainer board. An elastic member is interposed between the probe sheet and the insulating substrate. The retainer board and the probe sheet are brought into so closer relationship that each integrated circuit terminal of the semiconductor wafer held by the retainer board is electrically connected to its corresponding probe terminal of the probe sheet.


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