The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2001

Filed:

Apr. 08, 1997
Applicant:
Inventors:

Jeffrey Curtis Hedrick, Park Ridge, NJ (US);

Kostas Papathomas, Endicott, NY (US);

Amarjit Singh Rai, Vestal, NY (US);

Stephen Leo Tisdale, Endwell, NY (US);

Alfred Viehbeck, Fishkill, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/04 ;
U.S. Cl.
CPC ...
H05K 1/04 ;
Abstract

Disclosed is a printed circuit board, and a method of preparing a printed circuit board, which possesses a coefficient of thermal expansion substantially similar to that of silicon for use in direct semiconductor chip attach structures and similar solder mounted devices. The printed circuit board is fabricated from prepreg having a thermosetting resin and a reinforcement layer consisting of non-woven aramid mat or a liquid crystalline polymer paper. The composite dielectric layer optionally includes plated through holes which are either filled or non-filled, and one or more thin film redistribution layers to provide high density electronic packages. The design places the solder pads at the PTHs where needed. The redistribution layer can be formed using photoimagable dielectrics or laminated controlled-CTE composites and laser via imaging.


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