The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2001

Filed:

Feb. 02, 2001
Applicant:
Inventor:

Chung W. Ho, Monte Sereno, CA (US);

Assignee:

Thin Film Module, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/352 ;
U.S. Cl.
CPC ...
H01L 2/352 ;
Abstract

A new method is provided for packaging high-density IC semiconductor devices. A metal substrate is provided, a layer of dielectric is deposited over the first surface of the metal panel. One or more interconnect layers are then created on top of the dielectric layer, the interconnect layers, which can be thin film interconnect layers, are patterned using maskless exposure equipment. One or more cavities are created in the second surface of the metal panel; openings through the layer of dielectric are created where the layer of dielectric is exposed in the openings in the metal substrate thereby providing points of electrical contact to the second surface of the interconnect substrate. Holes are created in the first surface of the interconnect substrate thereby providing points of electrical contact to the first surface of the interconnect substrate. Bare semiconductor devices and/or packaged semiconductor devices can be attached on one or both sides of the interconnect substrate. Connector pads on the first surface of the interconnect substrate can be used to insert the substrate into a connector socket.


Find Patent Forward Citations

Loading…