The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 06, 2001
Filed:
Oct. 28, 1999
Faran Nouri, Los Altos, CA (US);
Koninklijke Philips Electronics N.V. (KPENV), Eindhoven, NL;
Abstract
In an example embodiment, a method for manufacturing a semiconductor device having shallow trench isolation comprises forming a trench region in a substrate having a substantially planar bottom, a first and second sidewall. In the trench region, the method forms a dielectric liner on the bottom and the first and second sidewalls. The dielectric liner is a silicon nitride compound. The dielectric liner minimizes the anomalous increases in threshold voltage with width (V,versus W) owing to transient enhanced up-diffusion of the channel profile induced by source/drain implant damage. In addition, the anomalous increase in V,versus W associated with the formation of an interstitial gradient in sub-micron devices is reduced. By using a nitrided liner, V,roll off due to boron segregation is also minimized.