The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 06, 2001
Filed:
Oct. 26, 2000
Industrial Technology Research Institute, Hsinchu, TW;
Abstract
A method for simultaneous bumping/bonding an IC chip to a semiconductor substrate and a semiconductor package fabricated by the method are described. In the method, a plurality of edge-type conductive pads formed of under-bump-metallurgy layers are first fabricated on an IC chip by dicing through conductive pads formed on a silicon wafer. The edge-type conductive pads, or UBM layer, are then positioned in close proximity to conductive elements formed on a top surface of a semiconductor substrate. A volume of solder is then applied to the interface between the conductive pads and the conductive elements to form electrical bonds between the two. A suitable method for applying the volume of solder may be a solder jetting technique, a solder printing technique or a method utilizing pre-applied solder paste on the surfaces to be bonded together. The present invention method allows a multiplicity of IC chips equipped with edge-type conductive pads to be fabricated by dicing a silicon wafer through conductive pads formed on a top surface. A multiplicity of IC chips can be fabricated at low fabrication cost. The method further provides the benefit that an IC chip may be bonded to a semiconductor substrate in either a face-up or a face-down position. This is made possible by the conductive pads formed on the vertical edges of the IC chip which connect to conductive elements formed on a semiconductor substrate.