The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 2001

Filed:

Apr. 16, 1998
Applicant:
Inventors:

Takao Kuroda, Kyoto, JP;

Hideki Ishida, Toyama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/500 ;
U.S. Cl.
CPC ...
G06F 1/500 ;
Abstract

The necessary information such as chip area A, number of elements, and defect density D is inputted to calculate element density TD and mean element density TDM. The inverse operation chip area A′ is calculated from the estimation equation: Y=f(A) such as Stapper's equation showing the dependence of the yield on the defect density D and chip area A. Next, for various kinds of integrated circuit devices in a diffusion process, the functional relation g (TD/TDM) which is considered to be most correct is determined from the data of the relationship between the ratio (A′/A) and the ratio (TD/TDM), and from the relational expression g (TD/TDM), the correction factor K is calculated. Finally, the values of the correction factor K and the chip area A are substituted into Y=f(A×K) to calculate the expected yield Y.


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