The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2001
Filed:
Jun. 22, 1999
Satoru Amou, Hitachi, JP;
Masao Suzuki, Hitachi, JP;
Tokihito Suwa, Hitachinaka, JP;
Mineo Kawamoto, Hitachi, JP;
Akio Takahashi, Hitachioota, JP;
Masanori Nemoto, Juou-machi, JP;
Hiroyuki Fukai, Shimodate, JP;
Mitsuo Yokota, Yuuki, JP;
Shiro Kobayashi, Isehara, JP;
Masashi Miyazaki, Hadano, JP;
Other;
Abstract
A multilayer circuit board having a resolution in the range of 25-80 &mgr;m, and blind via-holes between layers, the blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer having the blind via-holes between the layers has a glass transition temperature in the range of 150-220° C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process are reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes are suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.