The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2001

Filed:

Nov. 09, 1999
Applicant:
Inventors:

Robert A. Groves, Poughkeepsie, NY (US);

Dominique Nguyen-Ngoc, Putnam Valley, NY (US);

Dale K. Jadus, Wappingers Falls, NY (US);

Keith M. Walter, Newburgh, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/710 ; H01L 2/904 ;
U.S. Cl.
CPC ...
H01L 2/710 ; H01L 2/904 ;
Abstract

A low noise, high frequency solid state diode is provided from a plurality of unit diode cells which are interconnected in parallel. Each of the unit diode cells forms an element of an array having rows and columns of unit diode cells. The diode cells include a base region of polysilicon, forming an anode, and an active cathode region which forms a diode junction with the anode. A plurality of overlapping subcollector regions interconnect the cathode regions, to provide a single, continuous collector for the diode arrays. The base region has a minimum perimeter to area ratio which reduces the resistance of each active diode region. A plurality of cathode contacts are connected to the subcollector through a respective reach region of highly doped semiconductor material. One or more metalization layers connect the cathode regions together, and the anodes of the base regions together. By controlling the size and shape of the base region of polysilicon, the series resistance of the resulting diode is minimized.


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