The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2001
Filed:
Oct. 01, 1996
Analog Devices, Inc., Norwood, MA (US);
Abstract
An electronic programmable read-only-memory (EPROM) is provided having a field effect transistor with the gate electrode thereof coupled to a capacitor adapted to store charge produced in a channel region of the transistor in response to a logic state programming voltage applied between one of the source and drain regions and the gate electrode. The field effect transistor and the capacitor are formed in a common semiconductor body along with CMOS transistors. The field effect transistor has relatively heavy doped source and drain regions separated by an oppositely doped channel region. A gate electrode is disposed over the channel region. Lightly doped regions, having the same conductivity type as the source and drain regions, extend laterally from the source and drain regions to peripheral regions of the channel region to suppress generation of “hot” electrons in the transistor and the CMOS transistors. Relatively heavy doped regions are selectively formed in the field effect transistor of the EPROM are inhibited from being formed in the CMOS transistors. The relatively heavy doped regions have the same conductivity type as the source and drain regions and extending laterally from the source and drain regions, through and beyond the lightly doped regions, into the channel region. The additional, heavily doped regions are formed when heavily doped ESD regions are formed for diodes coupled to contact pads to prevent electrostatic discharge effects from harming the devices.