The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2001
Filed:
Feb. 15, 2001
Method of fabricating a capacitor under bit line structure for a dynamic random access memory device
Chih-Hsing Yu, Hsin-Chu, TW;
Kuo-Chi Tu, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-chu, TW;
Abstract
A process of forming a capacitor under bit line (CUB), structure, for a DRAM device, highlighted by simultaneous definition of the storage node structures, and a bit line contact structure, and by simultaneous definition of the capacitor top plate, and the bit line opening, has been developed. The process features forming a narrow diameter bit line contact hole, exposing a underlying polysilicon plug structure, while forming wider diameter, capacitor openings, to other underlying polysilicon plug structures. Polysilicon deposition, followed by a chemical mechanical polishing procedure, results in the simultaneous definition of the storage node, and bit line contact structures. Subsequent processing, comprising polysilicon and silicon oxide depositions, followed by an anisotropic RIE procedure, allow the definition of the capacitor structure to be defined simultaneously with the formation of a bit line opening.